Download CUDA Fortran for Scientists and Engineers: Best Practices by Gregory Ruetsch, Massimiliano Fatica PDF
By Gregory Ruetsch, Massimiliano Fatica
CUDA Fortran for Scientists and Engineers indicates how high-performance software builders can leverage the facility of GPUs utilizing Fortran, the usual language of medical computing and supercomputer functionality benchmarking. The authors presume no previous parallel computing event, and canopy the fundamentals in addition to most sensible practices for effective GPU computing utilizing CUDA Fortran.
To assist you upload CUDA Fortran to current Fortran codes, the publication explains the best way to comprehend the objective GPU structure, establish computationally extensive elements of the code, and adjust the code to regulate the knowledge and parallelism and optimize functionality. All of this can be performed in Fortran, with no need to rewrite in one other language. each one inspiration is illustrated with real examples so that you can instantly evaluation the functionality of your code in comparison.
• Leverage the facility of GPU computing with PGI's CUDA Fortran compiler
• achieve insights from contributors of the CUDA Fortran language improvement team
• comprises multi-GPU programming in CUDA Fortran, protecting either peer-to-peer and message passing interface (MPI) approaches
• comprises complete resource code for the entire examples and several other case stories
• obtain resource code and slides from the book's better half website
Read Online or Download CUDA Fortran for Scientists and Engineers: Best Practices for Efficient CUDA Fortran Programming PDF
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Additional resources for CUDA Fortran for Scientists and Engineers: Best Practices for Efficient CUDA Fortran Programming
31 32 32 34 35 36 39 39 41 42 A prerequisite to performance optimization is a means to accurately time portions of a code and subsequently describe how to use such timing information to assess code performance. In this chapter we first discuss how to time kernel execution using CPU timers, CUDA events, and the Command Line Profiler as well as the nvprof profiling tool. We then discuss how timing information can be used to determine the limiting factor of kernel execution.
2 Profiling Asynchronous Events . . . . . . 2 Device Memory . . . . . . . . . . . . 1 Declaring Data in Device Code . . . . . . . 2 Coalesced Access to Global Memory . . . . . . 1 Misaligned Access . . . . . . . . 2 Strided Access . . . . . . . . . 3 Texture Memory . . . . . . . . . . . 4 Local Memory . . . . . . . . . . . 1 Detecting Local Memory Use (Advanced Topic) . 5 Constant Memory . . . . . . . . . . 3 On-Chip Memory .
3 Such numbers can be used as a more realistic upper limit to memory bandwidth than the theoretical peak bandwidth. 2, where a read and write are performed for each of the 8 × 10242 elements, the following calculation is used to determine effective bandwidth on the C2050 (with ECC on) for the base method when using the -Mcuda=fastmath option: BWEffective = (8 × 10242 × 4 × 2)/109 = 106 GB/s 635 × 10−6 The number of elements is multiplied by the size of each element (4 bytes for a float), multiplied by 2 (because of the read and write), divided by 109 to obtain the total GB of memory transferred.