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By Mohamed K. Nezami
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Extra resources for RF Architectures and Digital Signal Processing Aspects of Digital Wireless Transceivers
Sample text
The use of filtering early in the IF stages will relax the harmonic filter specifications. One way to reduce the cost and size of the topology in Figure 1-30 is to remove the IF stage by using a single up conversion stage using the direct-modulation architecture shown in Figure 1-31. Here the baseband signal is directly modulated onto the carrier. Since the LO is running at the carrier frequency, the finite isolation between the output of the power amplifier (PA) and the modulator pose a serious problem causing injection pulling.
As an illustrative example, consider a baseband data rate of 64kbps processed for upconversion using the system in Figure 1-29. , The I and Q are at a data rate of 32kbps. Two baseband filters are then used to shape the spectrum of the data streams. Normally these filters are implemented using a root raised-cosine filter (RCF) [16] with a specific roll-off value that is specified to control the signal bandwidth. For this example the filter sampling frequency is 10 times the data rate, so the sample rate out of the shaping filter in Figure 1-29 is 320ksps.
Clearly, the transmitter topology in Figure 1-32 is favored over those in Figure 1-30 and Figure 1- 31because it offers the capability of suppressing harmonics without a bulky harmonic filter and can modulate constant envelope signals faithfully. To illustrate the quadrature mismatch and DC offset impact on digital modulators, assume that the baseband signal from a digital modulator such as those detailed earlier is given by, y (t ) = I (t ) cos(2πf LO t ) + Q (t ) sin(2πf LO t ) (1-61) where the baseband signal terms in (1-61) have some small DC offset, that is I (t ) = i (t ) cos(2πf m t ) + dc m and Q(t ) = q(t )(2πf m t ) + dc m , and let the LO signal also contain some DC offset.